Interrupts ========== An interrupt is in some ways like a subroutine call. They are both transfers of control to another routine, both save the contents of the program counter and return to the address held in the saved program counter when they are completed. Interrupts can be nested, with one interrupt handline routine (called an INTERRUPT HANDLER or an INTERRUPT SERVICE ROUTINE) being itself interrupted and control passed to another interrupt handling routine. However, there are a number of important differences, the most important being that an interrupt is a forced transfer of control. Whereas a subroutine call is an instruction in the calling program, an interrupt is not, but instead originates from an external device. Interrupts can occur at almost any point during a program's execution, though there are places where interrupts cannot occur. It should be possible to disable interrupts, for example when the system stack is full, during particularly urgent tasks, or during certain operations which cannot be interrupted, such as WAIT and SIGNAL operations on semaphores (these will be covered in a later lecture). Most machines allow several levels of interrupt priorities. This allows more urgent interrupt requests to be serviced before less urgent ones. The PDP-11 and other larger machines has such a system of priorities, while the Z80 has instructions for disabling and enabling interrupts. An example of an interrupt with which you should all be familiar is typing to stop data being listed on the VDU screen. There is no code in the program which checks whether a has been pressed. The scrolling stops because the listing program has been interrupted. When has been pressed, the program responsible for listing continues its execution. Another similar example of an interrupt is when you press to abort a program. In this case, though, control does not return to the calling program. A D -------->--------! !-------->------- Original Routine B C -------->-------- Interrupt Service Routine Effect of interrupt on program execution. An interrupt occurs at A in the original routine. Control is passed to the start of the interrupt service routine (B), which executes to completion (C), and returns control to the original routine at D, the instruction immediately following A. The interrupt service routine could itself have been interrupted. Use of Interrupts ----------------- An interrupt service routine is used when it is not possible to determine when the event causing the interrupt will take place before the program is run. It is often possible to use a loop whose exit condition depends on an event having taken place. This is called BUSY WAITING. In a MULTI-USER or MULTI-TASKING system, busy waiting is unacceptable for systems programs, because it uses time inefficiently. However, it is acceptable on small machines which only have one user, and whose operating systems allow only one process (or TASK) to be runnable at any given time. In this case, the process currently running must wait on an event to occur (as subsequent processing would depend on it), and the inefficient use of time does not matter as there are no other processes which can run while the current process is waiting on the event (because there are no other processes). This implies that the existence of an interrupt mechanism is necessary for a multi-user or multi-tasking system. An interrupt mechanism is also necessary for REAL-TIME systems. Real-time Systems ----------------- In a sense, all programs are real-time systems, as they all have some form of I/O (otherwise they are useless), and I/O functions operate in real time. A large number of commercial DP programs have been described as real-time, as they may have to finish running by a certain time, or require fast response to user's queries. For example, people would be somewhat disgruntled of they has to wait for hours at an automatic teller machine, or wait several years for a pay-cheque. However, these are not really real-time programs, as, in the case of a payroll program, no special programming considerations need be taken into account for the program to complete execution before pay-day (it may require only several minutes of processor time anyway), and it would be quite in order to have several minute's waiting time at an automatic teller machine - people are not likely to leave until they have received their money, and the same people are prepared to wait five minutes for passport photographs to develop, or even half an hour (say) for a train. The important thing about these systems is that no data are lost, and no damage is done if the systems execute slower. There are systems which do require special programming considerations, otherwise important data would be lost or damage would be done. Programs which collect data or control physical processes fall into this category. Examples are: Data collection :- monitoring of laboratory experiments, radar systems, satellite data collection systems. Process control :- aircraft control systems, automated assembly lines, railway switching equipment, missile and torpedo guidance systems. A data communications network is also a good example of a real- time system, not because response times need to be fast, but because if the processors at the nodes do not operate fast enough, data are lost. Many systems are hybrids of the two, including some of those mentioned above. A satellite, in addition to its data collection role, must be able to respond to commands which control it. Real-time Programming Techniques Real-time systems sometimes have to take action on one or more events BY a certain time, perform certain actions AT a certain fixed time, or handle events AS they occur. The first requirement implies that all of the actions can indeed be performed sufficiently quickly and, if not, that at least the most important ones can. The second requires that the system has access to the system clock, and the third requires the use of interrupts. All three (especially the first) require that the program execute as quickly as possible. The program must then be optimised for speed, and perhaps should be hand-written in assembler. The first also requires that a SCHEDULER be used. This selects which tasks to execute, and when. To handle events as they occur, interrupts must be used. It must be possible to nest interrupts, because an interrupt may take a long time to handle, and in the meantime several other devices might request interrupts. If interrupts can be nested, a long interrupt service routine can itself be interrupted by devices requiring more urgent attention. If several interrupts occur at the same time, then the one to be serviced first should be the one with the highest priority. Interrupts on the PDP-11 ------------------------ When an interrupt occurs on the PDP-11, the processor status word (PSW) and program counter are saved on the stack. The start address of the interrupt service routine and a new PSW are obtained from the INTERRUPT VECTOR of the device which caused the interrupt. Each device capable of causing an interrupt has its own interrupt vector. When the interrupt service routine has run to completion, the original PC and PSW are restored from the stack. The return instruction used in interrupts is not the RTS instruction of subroutines, but the RTI instruction. This is because the PSW must be restored from the stack in addition to the PC. Stack Interrupt Processor !---------! ---- Vector Registers ! ! <-- ! SP ! --------- --------- !---------! ---- ! ISR PSW ! ! PSW ! ! ! !---------! !---------! !---------! !ISR Addr ! ! PC ! ! ! --------- --------- !---------! Before and After Interrupt !---------! ! ! --------- --------- !---------! ! ISR PSW ! ! ISR PSW !-<--! PSW ! !---------! !---------! !---------! ---- !ISR Addr ! !ISR Addr !-<--! PC ! <-- ! SP ! --------- --------- !---------! ---- ! ! During Interrupt The Processor Status Word The PSW contains the current and previous processor modes. There are three possible modes - user, supervisor and kernel. Each mode has its own stack and memory management registers. There are in fact three R6 registers in the PDP-11's CPU, one for each mode. The PDP-11 contains two sets of registers R0 - R5. Which set is used at any given time depends on bit 11 of the PSW. The processor priority determines whether the task currently being executed can be interrupted, and, if so, by what. An interrupt will only occur if the device requesting it has a higher priority than the current task. A device's priority is held in its interrupt vector PSW. The remaining bits of the PSW are the flags. The flags are as follows: Condition under which flag is set T - trap bit program controllable N - negative bit result of last calculation was negative Z - zero bit result of last calculation was zero V - overflow bit last calculation resulted in overflow C - carry bit last calculation resulted in carry Setting the trap bit will cause program control to be interrupted and a new PSW loaded. This can be done by executing the EMT, TRAP, BPT ot IOT instructions. These are effectively software interrupts. A fixed address is loaded into the PC. These instruction are useful for setting breakpoints. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------- ! ! ! !Not Used!Priority! T! N! Z! V! C! ------------------------------------------------- ! ! ! Flags ! ! ! Current ! ! Mode ! ! Previous General Mode Register Set Contents of Processor Status Word.